EDA360 proposes a marriage between hardware and software. Each of them evolved independently and on integration, the final product has been “good enough” but not OPTIMAL. Either the software is unaware of the features in hardware or the hardware is incognizant with the requirements of software. Furthermore, when there is an issue with the system operation, ownership of debugging is a big question mark. EDA360 suggests correction at all levels through 3 realizations.
Silicon Realization – Associated with Creators and Integrators (serving as Creators also), it aims to design (an IP, a sub-system or a chip) for high performance, low power and small form factor. With increasing design complexity, matters related to low power, mixed signal design, 3D IC, DFM and yield are worrying the technocrats more than ever. Within the hardware arena, the tool evolution for functional, physical and electrical domains happened in silos and this constantly hampers efficiency, productivity and predictability. Amidst these technical challenges, pressure of time to market leaves no room for error. To achieve the goal of 3Ps, design teams need to control complexity at a higher abstraction level. This means that all variables of the design process should be accessible i.e. controllable and observable at a higher layer. There is a need for an integrated flow along with unified representation of intent to drive the design from this abstract layer to silicon such that there is interoperability on functional, physical and electrical parameters at each level.
SOC Realization – Associated with Integrators it extends expectations towards Creators. The traditional approach to SOC development is serial i.e. SOC à [OS + SW] à APPS. Each of these steps have least interaction and knowledge sharing, thereby leading to poor Productivity i.e. sub optimal hardware usage and increased failures in the end product. This adds to the cost & delay affecting Predictability and Profitability. Moreover, disjoint teams result into ownership issue (HW or SW problem) if the end product doesn’t behave as expected. SOC realization proposes a potential solution to such problems by treating SOC as a HW that is always accompanied with device drivers. This can be achieved by deploying a top down approach where SOC design and related (embedded) SW development happen in parallel. TLM and virtual prototyping aid in testing these SW layers well in advance before the silicon comes back. Extrapolating this approach sets expectations for IP developers to package the whole stack i.e. TLM, RTL, Netlist, design constraints, VIP and device drivers as part of IP deliverable.
System Realization – It is associated with Integrators. In the conventional flow [HW à SW à APPS], Productivity suffers as, HW is either over designed to support unforeseen applications or under designed limiting application support. This bottom up approach involves minimal planning and no what if analysis leading to poor selection of components (HW, OS, and Drivers etc) for the system. HW SW integration and APPS development happen late and with little knowledge of each other, contributing to inefficiencies and schedule delay [re-verification and ECOs] thereby affecting Profitability. Silicon Realization suggests a top down approach where applications drive the system requirements to overcome such issues and add differentiation as well as competitiveness to the end product. Chip planning tools assist in what if analysis with available set of components for a given architecture to improve predictability. TLM, Virtual prototyping and Emulation tools help with early software development and testing. Latest development in verification when extended at multiple levels provides a defined approach for embedded SW verification and bringing up a controllable & observable dashboard to manage the complete system development lifecycle.
The changing market dynamics has ignited the debate of ‘what should be’ from ‘what is’ available and if it demands a complete change in the way we design our products we better do it now before the next product from competition kicks our product out from the market.
Related posts -
EDA 360 : Realizing what it is?
EDA360 Realizations : Verification perspective
Related posts -
EDA 360 : Realizing what it is?
EDA360 Realizations : Verification perspective
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